JTAG Connectors and Interfaces

In earlier articles, we’ve taken a take a look at the unique JTAG customary, IEEE 1149.1. This included the JTAG check entry port (TAP), which permits the consumer to control a state machine to entry system internals and to run boundary-scan checks.

However whereas this info is crucial for understanding JTAG, additionally it is vital to know the bodily aspect, together with the connectors and pinouts, and the business JTAG interfaces accessible available on the market. On this article, we’re going to treatment the scenario, taking a much less theoretical strategy to JTAG as a complete. 

 

JTAG Connectors

There is no such thing as a customary connector for JTAG. As a rule, the “JTAG connector” is a normal male header, resembling a zero.1” header or a finer pitch header. As now we have seen, there are solely 4 (or 5) pins required to function a JTAG TAP. Nevertheless, a tool which is used to ‘talk’ with the TAP—known as a JTAG interface—additionally wants energy and floor connections, and designers can embrace different connections on the JTAG header in the event that they need.

So, given a board, how ought to a designer present JTAG entry? And, given a brand new board, the place must you look to seek out the JTAG connector?

Though there is no such thing as a one customary header for JTAG interfaces, a number of header sorts have turn into roughly standardized amongst producers. These embrace the ARM JTAG 20, the ARM JTAG 14, the TI JTAG 14, the STDC14 from STMicroelectronics, the OCDS 16-pin header [pdf] from Infineon, the CoreSight 10, the CoreSight 20, the MIPI 34, and the Mictor 38. Segger defines their J-Hyperlink and J-Hint connectors to be practically similar to the ARM JTAG 20. 

Most headers are shrouded or unshrouded male headers, with 10, 14, or 20 pins, and zero.1” or zero.05” pin pitch. Examples are proven in Determine 1. 

 

Determine 1. Frequent headers used for connecting to JTAG interfaces. 
 

The pinouts for varied JTAG interfaces (linked above) are proven in Determine 2. Right here you’ll discover the usual pins for JTAG (TDI, TDO, TCK, TMS, nTRST), in addition to serial wire debug (SWDIO, SWCLK, SWO), and extra capabilities for debugging, like core tracing. 

 

Determine 2. Pinouts of varied JTAG interfaces, proven on zero.1” shrouded male headers on this case.

 

Notably notable among the many added pins are nSRST (full system reset), which forces the goal to totally reset, and VTREF (voltage goal reference), related to the goal provide rail for JTAG interface level-shifting. 

 

JTAG Interfaces

A number of JTAG interfaces (additionally known as JTAG debug probes) can be found available on the market. Within the open-source enviornment, there’s the Black Magic Probe or BMP, developed by 1BitSquared and Black Sphere Applied sciences, used as an ARM JTAG interface, which has a big and energetic group supporting it. Black Magic Probe also can confer with any JTAG interface which has had its firmware changed with the Black Magic Probe firmware.

The business, broadly used debug probes from Segger embrace the J-Hyperlink (proven in Determine three) and the J-Hint, a significantly extra superior and succesful debug probe appropriate for industrial functions. The place the J-Hyperlink could be discovered for underneath $100 underneath an schooling license, or for between $400 – $1,000 for business functions, the J-Hint prices between $1,700 and $2,500. 

 

Determine three. Segger J-Hyperlink PRO debugging probe and JTAG interface

 

Particular distributors can even promote JTAG interfaces for his or her merchandise. STMicroelectronics gives the STLINK collection (together with the STLINK/V2, and the STLINK-V3SET) for his or her STM8 and STM32 merchandise, Atmel (now Microchip) gives the Atmel-ICE, NXP has the S32 Debug Probe—the checklist goes on.

FPGAs additionally use JTAG to obtain bit streams onto units/recollections, however these interfaces are extra usually known as obtain cables. Examples embrace Xilinx’s Platform Cable II and Altera’s FPGA obtain cable, previously often known as the USB-Blaster II, now rebranded because the Intel FPGA Obtain Cable II.

So what precisely is happening in these units that makes them so costly? What capabilities do they help, and the way does a designer use them? Usually, in the event you look inside a low-end debug probe, you’ll discover the next:

A microcontroller as the primary JTAG controller
A USB interface, which can be embedded within the microcontroller or could come individually in, for instance, an FTDI chip
Stage shifting circuitry for logic compatibility
Switching circuitry for enabling and disabling totally different paths, pull-ups, and so forth.

And that’s about it. For instance, take a look at the Black Magic Probe information, accessible on Github. A lot of the work (and price) comes on the software program finish, offering highly effective (typically real-time) debugging instruments that enable a developer to take advantage of the Arm CoreSight structure.

 

Conclusion

Up to now, now we have lined the JTAG customary, together with the check entry port (TAP) and its state machine. On this article, we took a take a look at the bodily aspect of JTAG, investigating the connectors and interfaces accessible to the designer from the open-source as much as the business high-end.

From right here, all that continues to be is a better take a look at the Arm CoreSight structure and its debug interface (ADI), which is able to embrace the more and more frequent serial wire debug (SWD) JTAG various.

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